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  lt1796 1 1796fa for more information www.linear.com/lt1796 typical application features description overvoltage fault protected can transceiver the lt ? 1796 can transceiver provides built-in fault toler - ance to survive in industrial and automotive environments . discrete protection devices are not needed . bus interface pins can withstand voltage faults up to 60v with respect to ground with no damage to the device . faults may oc - cur while the transceiver is active , shut down or powered off. on-chip esd protection withstands up to 15kv air discharges and 8kv contact mode discharges tested per iec-1000-4-2. loss of power or ground connections does not damage the ic. the circuit operates with data rates up to 125kbaud . a slew control pin allows control of transmitted data pulse edges to control emi and reflection problems on imper - fectly terminated lines . high output current drive allows the use of inexpensive p vc cable with impedance as low as 72. the 100k input impedance allows up to 256 transceivers per data network. the lt1796 is available in 8- lead pdip and so packages . applications n protected from overvoltage line faults to 60v n esd protection to iec-1000-4-2 level 4 15kv air gap test 8kv contact mode test n iso 11898 compatible n high input impedance supports up to 256 nodes n controlled slew rates for emi emissions control n high impedance outputs when off or powered down n short-circuit protection on all outputs n thermal shutdown protection n pin compatible with philips pca82c251 n industrial control data networks n automotive systems n hvac controls l , lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. fault protected can bus network r t 120 1796 ta01 r t 120 lt1796 txd 5v rxd v ref r s gnd r 0.1f 7 14 65 2 8 d lt1796 txd 5v rxd v ref r s gnd r 0.1f 7 14 6 5 2 8 d 125kbps canh and canl driver output 5v/div canh-canl 2v/div canh 2v/div txd in 5v/div canh 2v/div 1796 ta02 downloaded from: http:///
lt1796 2 1796fa for more information www.linear.com/lt1796 pin configuration absolute maximum ratings supply voltage (v cc ) ............................................... 44v r s slope control input voltage ................. C 0. 3v to 44v v ref reference output pin .......................... C0. 3v to 7v driver input voltage .................................. C0. 3v to 44v canh , canl data line pins....................... C 80v to 80v receiver output voltages ............................. C0. 3v to 7v operating temperature range lt1796 c................................................... 0c to 70c lt1796 i ............................................... C 40 c to 85c storage temperature range .................. C 65 c to 150c lead temperature ( soldering , 10 sec ) ................... 300 c (note 1) 12 3 4 87 6 5 top view r s canh canlv ref txd gnd v cc rxd s8 package 8-lead plastic so n8 package 8-lead pdip d r t jmax = 150c, ja = 130c/w (n8) t jmax = 150c, ja = 150c/w (s8) order information electrical characteristics symbol parameter conditions min typ max units v canh canh output voltage v txd = 0v, no load v txd = 0v, r l = 60 3.8 2.8 4.4 3.5 5.0 4.6 v v v canl canl output voltage v txd = 0v, no load v txd = 0v, r l = 60 0 0 0.5 1.3 0.9 1.6 v v v od dominant state differential output voltage v txd = 0v, no load, v cc = 4.75v v txd = 0v, r l = 60, v cc = 4.75v v txd = 0v, r l = 36, v cc = 4.75v 3.0 1.5 1.2 3.6 2.0 1.7 5.0 4.2 4.2 v v v v rec recessive state differential output voltage v txd = 5v, r l = 60 C 10 0 10 mv v cmr recessive state common mode output voltage v txd = 5v, r l = 60, v cc = 5v 2.7 3 3.5 v the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v cc = 4.75v to 5.25v, v rs = 0v unless otherwise noted. lead free finish tape and reel part marking* package description temperature range lt1796cn8#pbf lt1796cn8#trpbf lt1796 cn8 8-lead pdip 0c to 70c lt1796cs8#pbf lt1796cs8#trpbf 1796 8-lead plastic so 0c to 70c lt1796in8#pbf lt1796in8#trpbf lt1796i in8 8-lead pdip C40c to 85c lt1796is8#pbf lt1796is8#trpbf 1796i 8-lead plastic so C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges . * the temperature grade is identified by a label on the shipping container . consult ltc marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ downloaded from: http:///
lt1796 3 1796fa for more information www.linear.com/lt1796 electrical characteristics dc electrical characteristics symbol parameter conditions min typ max units v cmd dominant state common mode output voltage r l = 60, v cc = 5v 2 2.5 3 v v ih txd input high voltage 2.8 v v il txd input low voltage 2 v i in1 txd input current 0 < v txd < v cc C5 5 a i sch canh short-circuit current, dominant mode v canh = 0v, v cc = 5.25v v canh = C36v, v cc = 5.25v v canh = C 60v, v cc = 5.25v v canh = 60v, v cc = 5.25v C250 C10 C10 0 C1 C1 1 C 60 0 0 10 ma ma ma ma i scl canl short-circuit current, dominant mode v canl = 5v, v txd = 0v, v cc = 5.25v v canl = 36v, v txd = 0v, v cc = 5.25v v canl = 60v, v txd = 0v, v cc = 5.25v v canl = C 60v, v txd = 0v, v cc = 5.25v 60 0 0 C 10 1 1 C1 250 10 10 0 ma ma ma ma r ind differential input resistance v txd = 5v, C 7v < v canh , v canl < 12v 140 240 350 k canh, canl input resistance v txd = 5v, C7v < v canh , v canl < 12v 70 120 175 k input fault current (canh, canl) v rs = 5v, C60v < v canh , v canl < 60v v txd = 5v, C60v < v canh , v canl < 60v v cc = 0v, C60v < v canh , v canl < 60v C3 C3 C3 3 3 3 ma ma ma symbol parameter conditions min typ max units v th differential input threshold voltage for receiver v rs = 0v, C 7v < v cm < 12v v rs = 5v, C7v < v cm < 12v l l 0.5 0.5 0.9 0.9 v v ?v th receiver input hysteresis C7v < v cm < 12v 70 mv v oh receiver output high voltage v cc = 4.75v, i o = C400a, v id = 500mv l 3 3.6 v v ol receiver output low voltage v cc = 4.75v, i o = 1.6ma, v id = 900mv l 0.15 0.4 v i scr receiver short-circuit current 0v < v o < v cc , v cc = 5.25v l 7 20 85 ma v ref reference output voltage C100a < i ref < 100a l 2.25 2.5 2.7 v v refsc reference output short-circuit current 0 < v ref < v cc l C20 20 ma v rssb r s pin standby threshold v cc = 5v l 2.5 2.8 4 v i rs r s input current v rs = 5v, v cc = 5v v rs = 0v, v cc = 5v r s = 47k, v cc = 5v l l l C270 C90 0.1 C200 C60 10 C140 C40 a a a i cc supply current dominant recessive standby no load, v rs = 0v, v txd = 0v, v cc = 5.25v r l = 60, v rs = 0v, v txd = 5v, v cc = 5.25v r l = 60, v rs = 5v, v cc = 5.25v l l l 4.3 3.8 0.8 7 7 1.5 ma ma ma the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v cc = 4.75v to 5.25v, v rs = 0v unless otherwise noted. the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v cc = 4.75v to 5.25v, v rs = 0v unless otherwise noted. downloaded from: http:///
lt1796 4 1796fa for more information www.linear.com/lt1796 dominant state bus voltage vs r l supply current vs data rate transmitting, 50% duty cycle r l () 0 v od (v) 3.0 2.52.0 1.5 1.0 0.5 0 50 100 150 200 1796 g01 250 t a = 25c data rate (kbps) 0 supply current (ma) 22 23 200 1796 g03 2120 50 100 150 250 24 t a = 25c note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. switching characteristics symbol parameter conditions min typ max units t bit minimum bit time (note 3) l 8 s f max maximum data rate (note 3) l 125 kbps t txdon driver input to bus active figures 1, 2 r s = 0k l 300 500 ns r s = 47k l 350 1000 ns t txdoff driver input to bus inactive figures 1, 2 r s = 0k l 500 1200 ns r s = 47k l 600 1500 ns t lbon loopback delay active figures 1, 3 l 0.6 1.5 s t lboff loopback delay inactive figures 1, 3 l 1.5 3 s t rxdoff receiver delay off figures 1, 4 l 400 600 ns t rxdon receiver delay on figures 1, 4 l 300 600 ns t rxdoffsb receiver delay off, standby v rs = 4v, figures 1, 4 l 1.5 4 s t rxdonsb receiver delay on, standby v rs = 4v, figures 1, 4 l 1 4 s t wake wake-up delay from standby figures 1, 5 l 1 15 s sr + positive slew rate r s = 0k r s = 47k l l 5 2 12 7 65 30 v/s v/s sr C negative slew rate r s = 0k r s = 47k l l 5 2 36 5 65 15 v/s v/s the l denotes the specifications which apply over the full operating temperature range. v rs = 0v unless otherwise noted. (note 2) note 2: unless otherwise specified, testing done at v cc = 5v, t a = 25c. note 3: bit time and data rate specifications are guaranteed by driver and receiver delay time measurements. typical performance characteristics downloaded from: http:///
lt1796 5 1796fa for more information www.linear.com/lt1796 r s pin current vs r s positive slew rate vs r s negative slew rate vs r s transmitter propagation delay vs temperature canh short-circuit current vs voltage canl short-circuit current vs voltage v canl (v) i sc (ma) 90 8070 60 50 40 30 20 10 0 C10 1796 g09 C60 C40 C20 0 20 40 60 t a = 25c r s (k) 0 slew control current (a) 250 200150 100 50 0 1796 g04 20 40 80 60 t a = 25c r s (k) 80 1796 g05 20 40 60 0 sr + (v/s) 10 15 50 t a = 25c r s (k) 0 sr C (v/s) 20 30 80 1796 g06 10 0 20 40 60 40 t a = 25c temperature (c) t txdoff and t txdon (ns) 700 600500 400 300 200 100 0 1796 g07 C50 C25 0 25 50 75 100 t txdoff t txdon v canh (v) i sc (ma) 20 0 C20 C40 C60 C80 C100C120 1796 g08 C60 C40 C20 0 20 40 60 t a = 25c typical performance characteristics receiver thresholds vs temperature receiver propagation delay vs temperature temperature (c) C50 v th (v) 0.80 0.750.70 0.65 0.60 C25 0 25 50 1796 g10 75 100 v th rising v th falling temperature (c) t rxdoff and t rxdon (ns) 400 350300 250 200 1796 g11 C50 C25 0 25 50 75 100 t rxdoff t rxdon downloaded from: http:///
lt1796 6 1796fa for more information www.linear.com/lt1796 pin functions txd ( pin 1 ): driver input . logic-level thresholds are set by v ref . a logic input level higher than v ref turns the driver outputs off , releasing control of the canh and canl lines . a logic input less than v ref turns the driver outputs on , pulling canh high and canl low . an open txd input will float high , turning the driver outputs off . the txd input pin can withstand voltages from C0.3v to 44v with no damage. gnd (pin 2): ground. v cc ( pin 3 ): positive supply input . normal operation is with a 4.75v to 5.25v supply . operation with supplies up to 44v is possible with unterminated bus lines . operation at high voltages with normally terminated busses will result in excessive power dissipation and activation of the thermal shutdown circuit . v cc should be decoupled with a 0.1f low esr capacitor placed as close to the supply pin as possible. rxd ( pin 4 ): receiver ttl level-logic output . a high level output indicates a recessive state ( zero-volt differential ) bus. a dominant state forces a low receiver output. v ref ( pin 5 ): reference output . the reference voltage sets the txd input threshold and the recessive bus common mode voltage at canh and canl . v ref is approximately v cc / 2 for low voltage operation . when v cc > 7.5v, v ref maintains a 3.5v level. canl ( pin 6 ): can bus low data line . the canl pin is one input to the receiver and the low driver output . in the dominant state ( txd low ), the driver pulls the canl pin to within 1v of gnd . in the recessive state ( txd high ), the driver output stays high impedance . the canl pin is protected from voltage faults from C60v to 60v in domi - nant, recessive , standby or powered off modes . on-chip esd protection meets iec-1000-4-2 levels.canh ( pin 7 ): can bus high data line . the canh pin is one input to the receiver and the high driver output . in the dominant state ( txd low ), the driver pulls the canh pin to within 1v of v cc . in the recessive state ( txd high ), the driver output stays high impedance . the canh pin is protected from voltage faults from C60v to 60v in domi - nant, recessive , standby or powered off modes . on-chip esd protection meets iec-1000-4-2 levels.r s ( pin 8 ): slope control . this pin is a multifunction control pin . when r s is high (v rs > 4v), the circuit goes into a low power standby mode . in standby , the driver always stays in a high impedance (recessive) state . the receiver operates in a low power (slow) monitoring mode . received data may be used to wake-up the system to full functionality. full speed normal operation occurs if r s is tied low through a resistance of less than 3k. the current out of r s will be limited to about 500a in the low state . controlling the current out of r s with a resistor greater than 3k or by using a current source allows slew rate control of the data output onto canh and canl. downloaded from: http:///
lt1796 7 1796fa for more information www.linear.com/lt1796 block diagram test circuit function tables timing diagram 2.5v v diff = v canh C v canl 5v txd 0v v diff v difflo v diffhi 25% 50% 1796 f02 t txdoff t txdon 2.5v figure 2. driver delay waveforms 2.5v 5v txd 0v rxd 0v 2v 0.8v 1796 f03 t lboff t lbon 2.5v figure 3. loopback delay waveforms 3v canl = 2.5v 3.5v canh 2.5v rxd 0.8v 2v 1796 f04 t rxdon t rxdoff 3v figure 4. receiver delay waveforms 2.5v 5v r s 0v rxd 0.8v 1796 f05 t wake figure 5. wake up from standby waveforms 5v 0.1f 7 3 1 4 6 1796 f01 r s 100pf 2 85 30pf txdrxd canh canl r s v ref gnd 60 figure 1. switching test circuit rx canhcanl 1796 bd gnd v ref slope/ standby reference voltage driver v cc 3 7 6 2 5 rxd 4 r s 8 txd 1 driver output inputs bus terminals txd r s canh canl operating state 0 v rs < 3v high low dominant 0 v rs > 4v hi-z hi-z standby 1 v rs < 3v hi-z hi-z recessive 1 v rs > 4v hi-z hi-z standby receiver output bus voltage v bus = v canh ? v canl r s rxd response time v bus < 0.5v <3v high fast 0.5v v bus 0.9v <3v indeterminate fast v bus > 0.9v <3v low fast v bus < 0.5v >4v high slow 0.5v v bus 0.9v >4v indeterminate slow v bus > 0.9v >4v low slow downloaded from: http:///
lt1796 8 1796fa for more information www.linear.com/lt1796 package description please refer to http:// www .linear.com/designtools/packaging/ for the most recent package drawings. n8 rev i 0711 .065 (1.651) typ .045 C .065 (1.143 C 1.651) .130 .005 (3.302 0.127) .020 (0.508) min .018 .003 (0.457 0.076) .120 (3.048) min .008 C .015 (0.203 C 0.381) .300 C .325 (7.620 C 8.255) .325 +.035C.015 +0.889C0.381 8.255 ( ) 1 2 3 4 8 7 6 5 .255 .015* (6.477 0.381) .400* (10.160) max note:1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc n package 8-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510 rev i) .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) 45 0 C 8 typ .008 C .010 (0.203 C 0.254) so8 rev g 0212 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc 1 2 3 4 .150 C .157 (3.810 C 3.988) note 3 8 7 6 5 .189 C .197 (4.801 C 5.004) note 3 .228 C .244 (5.791 C 6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note:1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) 4. pin 1 can be bevel edge or a dimple s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610 rev g) downloaded from: http:///
lt1796 9 1796fa for more information www.linear.com/lt1796 information furnished by linear technology corporation is believed to be accurate and reliable . however, no responsibility is assumed for its use . linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights . revision history rev date description page number a 8/15 increased t txdoff max limit 4 downloaded from: http:///
lt1796 10 1796fa for more information www.linear.com/lt1796 ? linear technology corporation 2001 lt 0815 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt1796 related parts typical application part number description comments ltc485 low power rs485 interface transceiver i cc = 300a typ ltc491 differential driver and receiver pair i cc = 300a typ ltc1483 ultralow power rs485 low emi transceiver controlled driver slew rate ltc1485 rs485 differential bus transceiver 10mbaud operation ltc1487 ultralow power rs485 with low emi, shutdown and high input impedance up to 256 transceivers on the bus lt1785 / lt1791 60v fault-protected rs485/rs422 transceivers 15kv esd protected ltc2875 60v can transceiver 3.3v or 5v supply, 4mbps operation, 25kv esd r t 120 r t 120 1796 ta03 lt1796 txd 5v rxd v ref r s gnd r 0.1f 7 1 3 4 65 2 8 d lt1796 txd 5v rxd v ref r s gnd r 0.1f 7 3 14 6 5 2 8 47k 47k d low emi, slew limited canbus network downloaded from: http:///


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